Key Highlights
- Broadcom has announced an ambitious goal to deliver a minimum of 1 million 3D stacked chips through 2027, representing a potentially multi-billion-dollar opportunity.
- This innovative technology layers two silicon components vertically, enhancing data transmission speeds while reducing power consumption by as much as 10 times.
- Fujitsu has become the inaugural client for this technology, currently developing engineering prototypes with mass production scheduled for later in 2026.
- The Fujitsu chip utilizes TSMC’s advanced 2-nanometer fabrication process combined with 5-nanometer technology.
- The semiconductor giant intends to introduce two additional stacking-enabled products during the latter half of 2026, with three more prototypes expected in 2027.
Broadcom ($AVGO) has established an aggressive milestone to deliver no fewer than 1 million units of its advanced 3D stacking chip technology through 2027, as revealed in an exclusive Reuters report dated February 26, 2026.
Harish Bharadwaj, who holds the position of vice president for product marketing at Broadcom, disclosed these plans in direct communication with Reuters.
This announcement represents the company’s first quantifiable sales objective for a technology platform that required approximately five years of research and development.
The innovation involves vertically integrating two semiconductor chips in a stacked configuration. This architectural approach enables accelerated data exchange between chips while simultaneously decreasing power requirements.
According to Bharadwaj, this methodology provides approximately tenfold improvement in energy efficiency versus conventional chip arrangements — an increasingly critical factor as artificial intelligence processing demands continue to expand.
“Now, pretty much all of our customers are adopting this technology,” Bharadwaj told Reuters.
The Japanese technology corporation Fujitsu has emerged as the pioneering adopter of this design approach. Fujitsu is presently manufacturing engineering validation samples and has scheduled commercial-scale production for later this year.
TSMC serves as the fabrication partner for Fujitsu’s chip, leveraging its cutting-edge 2-nanometer manufacturing process while integrating it with 5-nanometer technology. This flexible approach allows clients to select different TSMC process nodes based on specific requirements.
Expanded Product Roadmap
Broadcom’s strategy extends well beyond the Fujitsu collaboration. The semiconductor company anticipates launching two more products incorporating the stacking architecture during 2026’s second half.
An additional three chip designs are scheduled for prototype sampling throughout 2027. Development teams are simultaneously pursuing even more complex configurations featuring up to eight stacked chip pairs — potentially creating packages with 16 silicon layers.
The million-unit objective encompasses the entire product portfolio, rather than being limited to the Fujitsu design alone.
Broadcom’s approach in the artificial intelligence semiconductor sector centers on collaborative custom silicon development with major technology firms. Google relies on Broadcom for designing its Tensor Processing Units (TPUs). OpenAI has similarly partnered with Broadcom for proprietary processor development.
Artificial Intelligence Revenue Momentum
Broadcom forecasted that its AI semiconductor revenue would hit $8.2 billion during its first fiscal quarter — representing approximately 100% growth compared to the equivalent timeframe in the previous year.
This substantial expansion has primarily resulted from bespoke chip agreements with hyperscale cloud providers, where Broadcom converts conceptual designs into manufacturable chip layouts that TSMC subsequently produces.
The 3D stacking innovation introduces both a technical advancement and a commercial expansion opportunity to this established business model.
Broadcom’s AI chip revenue was projected at $8.2 billion for Q1 fiscal 2026, doubling year-over-year.
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